Common
FMA instruction set
Extension to the x86 instruction set
FMA instruction set
The FMA instruction set is an extension to the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations on 128-bit and 256-bit operands. These operations were extended to 512-bit operands by the AVX-512 extension introduced by Intel and later supported by AMD. There are two incompatible variants of the FMA instruction set. They have the same operations but differ in the number of operands: FMA4 is the four-operand variant (three source operands and a destination register). AMD added FMA4 with the Bulldozer (2011) architecture. Zen 1 (2017) processors still execute FMA4 instructions but do not report them as supported through CPUID, and Zen 2 (2019) removed them. Intel originally specified FMA4 in 2008, but changed its design to three operands later that year. FMA3 is the three-operand variant (three source operands, one of which is also the destination). AMD added FMA3 with the Piledriver (2012) architecture, for compatibility with Intel's planned Haswell processors...
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